1. Field of the Invention
The invention relates to a control method and an allocation structure for a flash memory device. Particularly, the invention relates to a control method and an allocation structure for a flash memory device having a plurality of memory modules.
2. Description of Related Art
A flash memory is one kind of non-volatile memories, which can maintain stored data without power. The flash memories are categorized into NOR flash memories and NAND flash memories. Moreover, the flash memories can also be categorized into single level cell (SLC) flash memories and multi level cell (MLC) flash memories according to an amount of bits capable of being stored in a single memory cell. Wherein, the “single level” represents that each of the memory cells can only record data of one bit, and the “multi level” represents that each of the memory cells can record data of multiple bits. Since the MLC can record more data bits compared to the SLC, the MLC has to distinguish values of the stored data according to more different threshold voltage distributions.
A data writing rate is one of indicators for assessing a quality of a flash memory. Generally, a flash memory with a fast data writing rate is regarded as a good quality memory, and a flash memory with a slow data writing rate is regarded as a poor quality flash memory. Regarding the MLC flash memory, since a plurality of bits is stored in a single memory cell thereof, during a data writing process, relatively more time is required for programming the memory cells. Therefore, compared to the SLC flash memory, the data writing rate of the MLC flash memory is relatively slow.
Moreover, to facilitate managing the flash memory, the flash memory is generally divided into a plurality of allocation units (AUs), and each of the allocation units has one or more physical blocks. A maximum capacity of the allocation unit relates to a total capacity of the flash memory. Taking a memory card with a total capacity of 512 MB (megabytes) as an example, a maximum capacity of an allocation unit thereof is 2 MB, and taking a memory card with a total capacity of 1 GB-32 GB (gigabytes) as an example, a maximum capacity of an allocation unit thereof is 4 MB. Generally, when data is about to be written into the memory, a controller may write the data into the memory according to the capacity of the allocation unit.
On the other hand, regarding secure digital (SD) memory cards, data writing rates of the SD memory cards are uniformly defined into a plurality of classes by various manufactures. For example, regarding a SD memory card of a class 0, a relatively long data writing delay is allowed, and a data writing rate thereof is not particularly required. Regarding a SD memory card of a class 2, a data writing rate thereof is at least 2 MB per second. Regarding a SD memory card of a class 4, a data writing rate thereof is at least 4 MB per second, and regarding a SD memory card of a class 6, a data writing rate thereof is at least 6 MB per second.
Further, when a SD memory card is complied with a requirement of a certain class, it means that regardless of writing data into any allocation unit of the SD memory card, a data writing rate thereof is not less than a minimum data writing rate required by the corresponding class.
Moreover, the controller of the flash memory may group the physical blocks of one or more memories into one group to serve as a basic unit maintaining a data writing operation of the flash memory. Generally, a capacity of a single group grouped by the controller is equal to the maximum capacity of the allocation unit, so as to achieve a better performance of the flash memory.
Referring to FIG. 1, FIG. 1 is a schematic diagram illustrating a process of writing a data string 100 into a flash memory module 150 according to a conventional technique. The data string 100 has a plurality of allocation units (for example, allocation units 110_1-110_4). Each of the allocation units has data of 4 MB. The flash memory module 150 has a plurality of physical blocks (for example, physical blocks 160_1-160_16). A capacity of each of the physical blocks is 1 MB, and each four physical blocks form a group. A data amount of each allocation unit is equal to a capacity of one group (i.e. a capacity of four physical blocks). Each of the allocation units can be divided into four parts of data, and each part of data is equal to 1 MB. Taking the allocation unit 110_1 as an example, it has a first part of data 110_11, a second part of data 110_12, a third part of data 110_13 and a fourth part of data 110_14, and the four parts of data 110_11-110_14 of the allocation unit 110_1 are sequentially written into the four physical blocks 160_1-160_4 of a same group. Similarly, as shown in FIG. 1, four parts of data 110_21-110_24 of the allocation unit 110_2 are sequentially written into the four physical blocks 160_5-160_8. Four parts of data 110_31-110_34 of the allocation unit 110_3 are sequentially written into the four physical blocks 160_9-160_12. Four parts of data 110_41-110_44 of the allocation unit 110_4 are sequentially written into the four physical blocks 160_13-160_16.
Referring to FIG. 2, FIG. 2 is a schematic diagram illustrating a process of writing the data string 100 into a flash memory 200 according to a conventional technique. The flash memory 200 has a first memory module 210 and a second memory module 220. Each of the memory modules of the flash memory 200 has a plurality of physical blocks, and a capacity of each physical block is 1 MB. For example, the first memory module 210 includes a plurality of physical blocks 230_1-230_8, and the second memory module 220 includes a plurality of physical blocks 240_1-240_8. When the data string 100 is written into the flash memory 200, the four parts of data 110_11-110_14 of the allocation unit 110_1 are written into the two physical blocks 230_1 and 230_2 of the first memory module 210 and the two physical blocks 240_1 and 240_2 of the second memory module 220. Similarly, the four parts of data 110_21-110_24 of the allocation unit 110_2 are written into the physical blocks 230_3, 230_4, 240_3 and 240_4. The four parts of data 110_31-110_34 of the allocation unit 110_3 are written into the physical blocks 230_5, 230_6, 240_5 and 240_6. The four parts of data 110_41-110_44 of the allocation unit 110_4 are written into the physical blocks 230_7, 230_8, 240_7 and 240_8.
Referring to FIG. 3, FIG. 3 is a schematic diagram illustrating a process of writing the data string 100 into a flash memory 300 according to a conventional technique. The flash memory 300 has a first memory module 310 and a second memory module 320. Each of the memory modules of the flash memory 300 has a plurality of physical blocks, and a capacity of each physical block is 1.5 MB. The first memory module 310 includes a plurality of physical blocks 330_1-330_8, and the second memory module 320 includes a plurality of physical blocks 340_1-340_8. Now, the data amount of 4 MB of each allocation unit cannot be opportunely formed by an integral multiple of the physical blocks of the 1.5 MB. Therefore, the invention provides a solution, by which a memory capacity is not wasted, and meanwhile a data writing rate for writing data into each of the allocation units is even, so as to comply with the data writing rate requirement of the memory card (for example, the SD memory card).